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NXP Semiconductors
MSB
PCA85132
LCD driver for low multiplex rates
LSB
7
6
5
4
3
2
1
0
CO RS
not relevant
mgl753
Fig 22. Control byte format
In this way, it is possible to configure the device and then fill the display RAM with little
overhead.
The command bytes and control bytes are also acknowledged by all addressed
PCA85132 connected to the bus.
The display bytes are stored in the display RAM at the address specified by the data
pointer and the subaddress counter; see Section 7.5.1 and Section 7.5.2 .
The acknowledgement after each byte is made only by the (A0 and A1) addressed
PCA85132. After the last (display) byte, the I 2 C-bus master issues a STOP condition (P).
Alternatively a repeated START may be asserted to restart an I 2 C-bus access.
PCA85132
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 11 July 2013
? NXP B.V. 2013. All rights reserved.
32 of 62
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